X86 Cache time for L1/L2 cache refreshing?

[osknockout 0]

Does anyone know on average how many cycles it takes for the L1 and L2 caches to be refreshed on recent x86 processors? - I.e. the time for the replacement policy to be executed using the same memory area?The reason I'm asking this is that I'm trying to write a program (er, kernel to be specific) that heavily depends on self-modifying code in order to stay within space constraints and I'm trying to avoid having constant cases when the cache holds the old code, the actual memory holds the new code, and the processor executes the old code in the cache.-And I know that there's something like a 30 cycle penalty on the deep-pipeline Pentium 4's for modifying code that's just about to be executed, but does that occur if the cache refresh happens just before the code is executed? - Theoretically at least?

[dre 0]

I thought it was 0 since cache uses SRAM which doesn't need to be refreshed? Not exactly sure on this though and too sleepy at the moment to go venture out for the exact answer.

[osknockout 0]

Eh - wow, it's been a while since this was posted - but that would mean that about 2MB of cache - for a good processor nowadays - is constantly refreshed. Wouldn't that be a bit too much on the system bus?